1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device including a circular shaped recess with a relatively smaller distance between the recess and a corresponding gate structure for improving the performance of the semiconductor device.
2. Description of the Prior Art
In order to increase the carrier mobility of semiconductor structure, it has been widely used to apply tensile stress or compressive stress to a gate channel. For instance, if a compressive stress were to be applied, it has been common in the conventional art to use selective epitaxial growth (SEG) technique to form epitaxial structure such as a silicon germanium (SiGe) epitaxial layer in a silicon substrate. As the lattice constant of the SiGe epitaxial layer is greater than the lattice constant of the silicon substrate thereby producing stress to the channel region of a PMOS transistor, the carrier mobility is increased in the channel region and speed of MOS transistor is improved accordingly. Conversely, a silicon carbide (SiC) epitaxial layer could be formed in silicon substrate to produce tensile stress for gate channel of an NMOS transistor.
Decreasing the distance between the epitaxial layer and the corresponding gate is one approach to improve the device performance because of the larger epitaxial volume and the higher stain to the channel. However, the edge of the epitaxial layer is generally aligned with the outmost surface of the sidewall spacer on the gate in the conventional structure, and the sidewall spacer must have a specific width to be consumed in the etching process of forming recesses between the gates. In other words, there is a limitation of reducing the width of the sidewall spacer for the purpose of decreasing the distance between the epitaxial layer and the corresponding gate.